Secure and Safe Hardware [SSH]

Les thématiques de recherche de l’équipe concernent les architectures et les méthodes pour concevoir efficacement des systèmes embarqués répondant à des contraintes fortes, comme la sécurité et la fiabilité. Ses objectifs sont en lien étroit avec l’étude des techniques de pointe permettant aux concepteurs de répondre aux contraintes toujours croissantes de gestion de la complexité, de fiabilité, de consommation électrique, de vitesse de fonctionnement, de sécurité et de flexibilité. Cette recherche est caractérisée par son lien fort avec les besoins industriels. Ainsi, elle se concentre sur de nouveaux concepts pour les technologies futures mais également sur des améliorations significatives aux produits existants. Ceci est illustré par la production scientifique du groupe, qui consiste non seulement en des publications mais également des brevets directement applicables par des industriels et du logiciel libre.

 

 

La recherche du groupe se focalise sur trois grands thèmes :

  • Les contraintes de sécurité sont traitées dans la thématique Matériel pour l’informatique sécurisée et de confiance (Trusted Computing Hardware)
  • Les contraintes de fiabilité sont traitées dans la thématique Analyse et conception de processeurs fiables basés sur des technologies non fiables (Analysis and Design of Reliable Processeurs Based on Unreliable Technologies)
  • Les contraintes de complexité et de consommation sont traitées dans la thématique Architectures optimales pour l’implémentation d’algorithmes complexes (Optimal Architectures for Complex Algorithms Implementations)

 

Membres de l’équipe

Mots-clés

Sécurité matérielle des systèmes embarqués contre les attaques physiques et cyber
Fiabilité matérielle des systèmes embarqués Architectures et méthodes de conception de systèmes embarqués

Les publications de l’équipe



202 documents

Article dans une revue

  • Eloi de Chérisey, Sylvain Guilley, Pablo Piantanida, Olivier Rioul. Best information is most successful: Mutual information and success rate in side-channel analysis. Transactions on Cryptographic Hardware and Embedded Systems (TCHES), 2019, 2019 (2), pp.49-79. ⟨hal-02287971⟩
  • Nilson Maciel, Elaine Crespo Marques, Lirida Alves de Barros Naviner, Hao Cai, Jun Yang. Voltage-Controlled Magnetic Anisotropy MeRAM Bit-Cell over Event Transient Effects. Journal of Low Power Electronics Applications, 2019, 9 (2), pp.1-14. ⟨10.3390/jlpea9020015⟩. ⟨hal-02288058⟩
  • Alexander Schaub, Olivier Rioul, Jean-Luc Danger, Sylvain Guilley, Joseph J. Boutros. Challenge Codes for Physically Unclonable Functions with Gaussian Delays: A Maximum Entropy Problem. Advances in Mathematics of Communications, AIMS, In press. ⟨hal-02300795⟩
  • Naghmeh Karimi, Jean-Luc Danger, Sylvain Guilley. Impact of Aging on the Reliability of Delay PUFs. Journal of Electronic Testing, 2018, 34 (5), pp.571-586. ⟨10.1007/s10836-018-5745-6⟩. ⟨hal-02287976⟩
  • Nilson Maciel, Elaine Crespo Marques, Lirida Alves de Barros Naviner, Hao Cai. Single-event transient effects on dynamic comparator in 28nm FDSOI CMOS technology. Microelectronics Reliability, 2018, 88-90, pp.965-968. ⟨hal-02287982⟩
  • Jean-Luc Danger, Youssef El Housni, Adrien Facon, Cheikh T. Gueye, Sylvain Guilley, et al.. On the Performance and Security of Multiplication in GF(2N). Cryptography, 2018, ⟨10.3390/cryptography2030025⟩. ⟨hal-02288010⟩
  • Ming Tang, Pengbo Wang, Xiaoqi Ma, Wenjie Chang, Huanguo Zhang, et al.. An Efficient SCA Leakage Model Construction Method Under Predictable Evaluation. IEEE-TIFS, 2018, ⟨10.1109/TIFS.2018.2837644⟩. ⟨hal-02288012⟩
  • Debapriya Basu Roy, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Wei He, et al.. The Conflicted Usage of RLUTs for Security-Critical Applications on FPGA. Journal of Hardware and Systems Security, 2018, ⟨10.1007/s41635-018-0035-4⟩. ⟨hal-02288011⟩
  • Chien-Yi Wang, Shirin Saeedi Bidokhti, Michèle Wigger. Improved Converses and Gap-Results for Coded Caching,. IEEE Transactions on Information Theory, 2018, 64 (3), pp.1957-1976. ⟨hal-02287708⟩
  • Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao. Exploring Hybrid STT-MTJ/CMOS Energy Solution in Near/Sub-Threshold Regime. IEEE Transactions on Magnetics, Institute of Electrical and Electronics Engineers, 2018, 54 (2), pp.1-9. ⟨hal-02287861⟩
  • Francisco Veirano, Lirida Alves de Barros Naviner, Fernando Silveira. Optimal Asymmetrical Back Plane Biasing for Energy Efficient Digital Circuits in 28 nm UTBB FD-SOI. Integration, the VLSI Journal, 2017. ⟨hal-02287634⟩
  • Francisco Veirano, Lirida Alves de Barros Naviner, Fernando Silveira. Optimum NMOS/PMOS Imbalance for Energy Efficient Digital Circuits. IEEE Transactions on Circuits and Systems I: Regular Papers, 2017. ⟨hal-02287635⟩
  • Nicolas Bruneau, Sylvain Guilley, Annelie Heuser, Damien Marion, Olivier Rioul. Optimal Side-Channel Attacks for Multivariate Leakages and Multiple Models. Journal of Cryptographic Engineering, 2017, 7 (4), pp.331-341. ⟨hal-02287606⟩
  • Mariem Slimani, Karim Benkalaia, Lirida Alves de Barros Naviner. Analysis of Ageing effects on ARTIX7 XILINX FPGA (article) Author. Microelectronics Reliabilit Journal, 2017. ⟨hal-02287639⟩
  • Nicolas Bruneau, Claude Carlet, Sylvain Guilley, Annelie Heuser, Emmanuel Prouff, et al.. Stochastic Collision Attack. IEEE Transactions on Information Forensics & Security, 2017, 12 (9), pp.2090-2104. ⟨hal-02287599⟩
  • Hao Cai, Wang Kang, You Wang, Lirida Alves de Barros Naviner, Jun Yang, et al.. High Performance MRAM with Spin-Transfer-Torque and Voltage-Controlled Magnetic Anisotropy Effects. Applied Science, 2017, 7 (9), 929 (13 p.). ⟨10.3390/app7090929⟩. ⟨hal-02287690⟩
  • Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao. Robust Ultra-Low Power Non-Volatile Logic-in-Memory Circuits in FD-SOI Technology. IEEE Transactions on Circuits and Systems I: Regular Papers, 2017, 64 (4), pp.847-857. ⟨hal-02287638⟩
  • You Wang, Hao Cai, Lirida Alves de Barros Naviner, Weisheng Zhao. A Non-Monte-Carlo Methodology for Variability Analysis of Magnetic Tunnel Junction-Based Circuits. IEEE Transactions on Magnetics, Institute of Electrical and Electronics Engineers, 2017, 53 (3), pp.1-6. ⟨10.1109/TMAG.2016.2638913⟩. ⟨hal-02287631⟩
  • Xuan-Thuy Ngo, Jean-Luc Danger, Sylvain Guilley, Tarik Graba, Yves Mathieu, et al.. Cryptographically Secure Shield for Security IPs Protection. IEEE Transcation on Computers, 2017, 66 (2). ⟨hal-02287686⟩
  • Weisheng Zhao, You Wang, Lirida Alves de Barros Naviner. Failure Analysis in Magnetic Tunnel Junction Nanopillar with Interfacial Perpendicular Magnetic Anisotropy. Materials Science Journal, 2017, 9 (41), pp.1-17. ⟨hal-02287641⟩
  • Laurent Sauvage, Tarik Graba, Thibault Porteboeuf. Multi-Level Formal Analysis, A New Direction for Fault Injection Attack?. Journal of Cryptographic Engineering, 2016. ⟨hal-02287457⟩
  • Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao. Breakdown Analysis of Magnetic Flip-flop With 28nm UTBB FDSOI Technology. IEEE Transactions on Device and Materials Reliability, 2016, 16 (3), pp.376-383. ⟨hal-02287471⟩
  • Hao Cai, Kaikai Liu, Lirida Alves de Barros Naviner, You Wang, Mariem Slimani, et al.. Efficient reliability evaluation methodologies for combinational circuits. Microelectronics Reliability, 2016, 64. ⟨hal-02287474⟩
  • Xuan-Thuy Ngo, Zakaria Najm, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger. Method taking into account process dispersion to detect hardware Trojan Horse by side-channel analysis. JCEN, 2016, ⟨10.1007/s13389-016-0129-2⟩. ⟨hal-02287501⟩
  • Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao. Low Power Magnetic Flip-Flop Optimization With FDSOI Technology Boost. IEEE Transactions on Magnetics, Institute of Electrical and Electronics Engineers, 2016, 52 (8), pp.1-7. ⟨hal-02287472⟩
  • Mariem Slimani, Lirida Alves de Barros Naviner, You Wang, Hao Cai. Reliability analysis of hybrid spin transfer torque magnetic tunnel junction/CMOS majority voters. Microelectronics Reliability, 2016, C (64), pp.48-53. ⟨hal-02287469⟩
  • Jean-Luc Danger, Sylvain Guilley, Ph. Hoogvorst, Cédric Murdica, D. Naccache. Improving the Big Mac Attack on Elliptic Curve Cryptography. LNCS : The new codebreakers, 2016, 9100, pp.374-386. ⟨10.1007/978-3-662-49301-4_23⟩. ⟨hal-02287332⟩
  • Jean-Luc Danger, Sylvain Guilley, Thibault Porteboeuf, Florian Praden, Michaël Timbert. Hardware-Enforced Protection Against Buffer Overflow Using Masked Program Counter. LNCS: the new codebreakers, 2016, pp.439-454. ⟨10.1007/978-3-662-49301-4_27⟩. ⟨hal-02287333⟩
  • Han Le Duc, D. M. Nguyen, Chadi Jabbour, Tarik Graba, Patricia Desgreys, et al.. All-Digital Calibration of Timing Skews for TIADCs Using The Polyphase Decomposition. IEEE Transactions on Circuits and Systems II, 2016, 63 (1), pp.99-103. ⟨hal-01271601⟩
  • Paulo Butzen, Mariem Slimani, You Wang, Hao Cai, Lirida Alves de Barros Naviner. Reliable majority voter based on spin transfer torque magnetic tunnel junction device. IEEE Electronics Letters, 2016, 52 (1), pp.47-49. ⟨hal-02287642⟩
  • Mariem Slimani, Arwa Ben Dhia, Lirida Alves de Barros Naviner. A Novel Analytical Method for Defect Tolerance Assessment. Microelectronics Reliability Journal, 2015, 55, pp.1285-1289. ⟨hal-01216729⟩
  • Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao. Ultra wide voltage range consideration of reliability-aware STT magnetic flip-flop in 28nm FDSOI technology. Microelectronics Reliability, 2015. ⟨hal-02287224⟩
  • Hao Cai, You Wang, Weisheng Zhao, Lirida Alves de Barros Naviner. Multiplexing Sense Amplifier Based Magnetic Flip Flop in 28nm FDSOI Technology. IEEE Transaction on Nanotechnology, 2015, 14 (4). ⟨hal-02287225⟩
  • Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, et al.. A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation. IEEE transactions on VLSI systems, 2015, ⟨10.1109/TVLSI.2014.2339892⟩. ⟨hal-02287186⟩
  • Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Wei He. Exploiting FPGA Block Memories for Protected Cryptographic Implementations. TRETS, 2015, ⟨10.1145/2629552⟩. ⟨hal-02287502⟩
  • Arwa Ben Dhia, Mariem Slimani, Hao Cai, Lirida Alves de Barros Naviner. A dual-rail compact defect-tolerant multiplexer. Microelectronics Reliability Journal, 2015, 55, pp.662-670. ⟨hal-01128326⟩
  • Ting An, Kaikai Liu, Hao Cai, Lirida Alves de Barros Naviner. Accurate Reliability Analysis of Concurrent Checking Circuits Employing An Efficient Analytical Method. Microelectronics Reliability, 2015, 55 (3-4), pp.696-703. ⟨hal-01122423⟩
  • Yeow Meng Chee, Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Han Mao Kiah, et al.. Multiply Constant-Weight Codes and the Reliability of Loop Physically Unclonable Functions. IEEE Transactions in Information Theory, 2014, ⟨10.1109/TIT.2014.2359207⟩. ⟨hal-02286947⟩
  • Christophe Clavier, Guillaume Duc, Jean-Luc Danger, Moulay Aziz Elaabid, Benoît Gérard, et al.. Practical Improvements of Side-Channel Attacks on AES: Feedback from the 2nd DPA Contest. Journal of Cryptographic Engineering, 2014, 4 (4), pp.259-274. ⟨10.1007/s13389-014-0075-9⟩. ⟨hal-02286726⟩
  • Claude Carlet, Finley Freibert, Sylvain Guilley, Michael Kiermaier, Jon-Lark Kim, et al.. Higher-order CIS codes. IEEE Transactions on Information Theory, 2014, 60 (9), pp.5283-5295. ⟨10.1109/TIT.2014.2332468⟩. ⟨hal-02286948⟩
  • Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Houssem Maghrebi. Leakage squeezing: Optimal implementation and security evaluation. Journal of Mathematical Cryptology, 2014, ⟨10.1515/jmc-2012-001⟩. ⟨hal-02287061⟩
  • Houssem Maghrebi, Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Emmanuel Prouff. Achieving side-channel high-order correlation immunity with leakage squeezing. JCEN, 2014, ⟨10.1007/s13389-013-0067-1⟩. ⟨hal-02286851⟩
  • Pablo Rauzy, Sylvain Guilley. A Formal Proof of Countermeasures Against Fault Injection Attacks on CRT-RSA. Journal of Cryptographic Engineering, Springer, 2013, pp.1-13. ⟨10.1007/s13389-013-0065-3⟩. ⟨hal-00863914v2⟩
  • Samuel Nascimento Pagliarini, Arwa Ben Dhia, Lirida Alves de Barros Naviner, J. F. Naviner. SNaP: a Novel Hybrid Method for Circuit Reliability Assessment Under Multiple Faults. Microelectronics Reliability, 2013, pp.1230-1234. ⟨hal-01062108⟩
  • Arwa Ben Dhia, Samuel Nascimento Pagliarini, Lirida Alves de Barros Naviner, Habib Mehrez, Philippe Matherat. A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs. Microelectronics Reliability, 2013, pp.1189-1193. ⟨hal-01062109⟩
  • Yu-Ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, et al.. Analysis of Electromagnetic Information Leakage from Cryptographic Devices with Different Physical Structures. IEEE Transactions on Electromagnetic Compatibility, 2013, 55 (3), pp.571-580. ⟨hal-02286819⟩
  • Laurent Sauvage, Jean-Luc Danger, Sylvain Guilley, Naofumi Homma, Yu-Ichi Hayashi. Advanced Analysis of Faults Injected Through Conducted Intentional ElectroMagnetic Interferences. Transactions on Electromagnetic Compatibility, 2013. ⟨hal-02286327⟩
  • Sylvain Guilley, Shivam Bhasin, Annelie Heuser, Jean-Luc Danger. From cryptography to hardware: analyzing and protecting embedded Xilinx BRAM for cryptographic applications. JCEN, 2013, ⟨10.1007/s13389-013-0048-4⟩. ⟨hal-02286503⟩
  • Shivam Bhasin, Claude Carlet, Sylvain Guilley. Theory of masking with codewords in hardware: low-weight $d$th-order correlation-immune Boolean functions. IACR eprint archive, 2013. ⟨hal-02286840⟩
  • Hao Cai, J. F. Naviner, H. Petit. A Hierarchical Reliability Simulation Methodology for AMS Integrated Circuits and Systems. Journal of Low Power Electronics, 2012, 8 (5). ⟨hal-02286422⟩
  • N. Selmane, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger. Security evaluation of application-specific integrated circuits and field programmable gate arrays against setup time violation attacks. Information Security, IET, 2011, 5 (4), pp.181-190. ⟨10.1049/iet-ifs.2010.0238⟩. ⟨hal-02286262⟩

Communication dans un congrès

  • Shugo Kaji, Masahiro Kinugawa, Daisuke Fujimoto, Laurent Sauvage, Jean-Luc Danger, et al.. Method for Identifying Individual Electronic Devices Focusing on Differences in Spectrum Emissions. 2019 Joint International Symposium on Electromagnetic Compatibility and Asia-Pacific International Symposium on Electromagnetic Compatibility, Sep 2019, Sapporo, Japan. ⟨hal-02319485⟩
  • Oualid Trabelsi, Laurent Sauvage, Jean-Luc Danger. Impact of Intentional Electromagnetic Interference on Pure Combinational Logic. 2019 International Symposium on Electromagnetic Compatibility - EMC EUROPE, Sep 2019, Barcelone, Spain. pp.398-403. ⟨hal-02318731⟩
  • Jean-Luc Danger, Laurent Fribourg, Ulrich Kühne, Maha Naceur. LAOCOÖN: A Run-Time Monitoring and Verification Approach for Hardware Trojan Detection. 2019 22nd Euromicro Conference on Digital System Design (DSD), Aug 2019, Kallithea, Greece. pp.269-276, ⟨10.1109/DSD.2019.00047⟩. ⟨hal-02338436⟩
  • Alexandre Menu, Shivam Bhasin, Jean-Max Dutertre, Jean-Baptiste Rigaud, Jean-Luc Danger. Precise Spatio-Temporal Electromagnetic Fault Injections on Data Transfers. 2019 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), Aug 2019, Atlanta, United States. pp.1-8, ⟨10.1109/FDTC.2019.00009⟩. ⟨hal-02338456⟩
  • Eloi De Cherisey, Sylvain Guilley, Olivier Rioul, Pablo Piantanida. An information-theoretic model for side-channel attacks in embedded hardware. 2019 IEEE International Symposium on Information Theory (ISIT 2019), Jul 2019, Paris, France. ⟨hal-02300788⟩
  • Etienne Tehrani, Tarik Graba, Jean-Luc Danger. Acceleration of Lightweight Block Ciphers on Microprocessors. CryptArchi 2019, Jun 2019, Prague, Poland. ⟨hal-02271470⟩
  • Jean-Luc Danger, Sylvain Guilley, Alexander Schaub. Two-Metric Helper Data for Highly Robust and Secure Delay PUFs. 2019 IEEE 8th International Workshop on Advances in Sensors and Interfaces (IWASI), Jun 2019, Otranto, Italy. pp.184-188, ⟨10.1109/IWASI.2019.8791249⟩. ⟨hal-02302114⟩
  • Oualid Trabelsi, Laurent Sauvage, Jean-Luc Danger. Characterization at Logical Level of Magnetic Injection Probes. 2019 Joint International Symposium on Electromagnetic Compatibility and Asia-Pacific International Symposium on Electromagnetic Compatibility, Jun 2019, Sapporo, Japan. ⟨hal-02318716⟩
  • Alexander Schaub, Sylvain Guilley, Olivier Rioul. STAnalyzer: A simple static analysis tool for detecting cache-timing leakages. 17th International Workshop on Cryptographic Architectures Embedded in Logic Devices (CryptArchi 2019), Jun 2019, Prague, Czech Republic. ⟨hal-02300786⟩
  • Sofiane Takarabt, Alexander Schaub, Adrien Facon, Sylvain Guilley, Laurent Sauvage, et al.. Cache-Timing Attacks Still Threaten IoT Devices. International Conference on Codes, Cryptology, and Information Security, Apr 2019, Rabat, Morocco. pp.13-30, ⟨10.1007/978-3-030-16458-4_2⟩. ⟨hal-02319488⟩
  • Etienne Tehrani, Jean-Luc Danger, Tarik Graba. Generic Architecture for Lightweight Block Ciphers: A First Step Towards Agile Implementation of Multiple Ciphers. 12th IFIP International Conference on Information Security Theory and Practice (WISTP), Dec 2018, Brussels, Belgium. pp.28-43, ⟨10.1007/978-3-030-20074-9_4⟩. ⟨hal-02294599⟩
  • Eloi De Cherisey, Sylvain Guilley, Olivier Rioul. Confused yet successful: Theoretical computation of distinguishers for monobit leakages in terms of confusion coefficient and SNR. 14th International Conference on Information Security and Cryptology (Inscrypt 2018), Dec 2018, Fuzhou, China. ⟨hal-02300768⟩
  • Jean-Luc Danger, Adrien Facon, Sylvain Guilley, Karine Heydemann, Ulrich Kühne, et al.. CCFI-Cache: A Transparent and Flexible Hardware Protection for Code and Control-Flow Integrity. 2018 21st Euromicro Conference on Digital System Design (DSD), Aug 2018, Prague, Czech Republic. pp.529-536, ⟨10.1109/DSD.2018.00093⟩. ⟨hal-01900361⟩
  • Elaine Crespo Marques, Nilson Maciel, Lirida Alves de Barros Naviner, Hao Cai, Jun Yang. Compressed Sensing for Wideband HF Channel Estimation. 4th International Conference on Frontiers of Signal Processing, Sep 2018, Poitiers, France. pp.1-5. ⟨hal-02287975⟩
  • Jean-Luc Danger, Risa Yashiro, Tarik Graba, Yves Mathieu, Abdelmalek Si-Merabet, et al.. Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology. 2018 21st Euromicro Conference on Digital System Design (DSD), Aug 2018, Prague, Czech Republic. pp.508-515. ⟨hal-02271687⟩
  • Alexander Schaub, Jean-Luc Danger, Sylvain Guilley, Olivier Rioul. An improved analysis of reliability and entropy for delay PUFs. Euromicro Conference on Digital System Design (DSD'18), Aug 2018, Prague, Czech Republic. ⟨hal-02288537⟩
  • Alexander Schaub, Olivier Rioul, Joseph Boutros, Jean-Luc Danger, Sylvain Guilley. Challenge codes for physically unclonable functions with Gaussian delays: A maximum entropy problem. Latin American Workshop on Coding and Information, Jul 2018, Unicamp-Campinas, Brazil. ⟨hal-02287965⟩
  • Naghmeh Karimi, Sylvain Guilley, Jean-Luc Danger. On the Effect of Aging in Detecting Hardware Trojan Horses with Template Analysis.. IOLTS, Jul 2018, Platja d'Aro, Spain. ⟨10.1109/IOLTS.2018.8474089⟩. ⟨hal-02288013⟩
  • Sofiane Takarabt, Kais Chibani, Youssef Souissi, Laurent Sauvage, Sylvain Guilley, et al.. Pre-Silicon Embedded System Evaluation as new EDA for Security Verification. International Verification and Security Workshop (IVSW), Jun 2018, Platja d’Aro, Spain. ⟨hal-02287930⟩
  • Eloi de Chérisey, Sylvain Guilley, Olivier Rioul. Confusing information: How confusion improves side-channel analysis for monobit leakages. 16th International Workshop on Cryptographic Architectures Embedded in Logic Devices (CryptArchi 2018), Jun 2018, Lorient, France. ⟨hal-02287934⟩
  • Alexander Schaub, Jean-Luc Danger, Sylvain Guilley, Olivier Rioul. Reliability and entropy of delay PUFs: A theoretical analysis. 16th International Workshop on Cryptographic Architectures Embedded in Logic Devices (CryptArchi 2018), Jun 2018, Lorient, France. ⟨hal-02287933⟩
  • Hao Cai, You Wang, Lirida Alves de Barros Naviner, Jun Yang, Wang Kang, et al.. Enabling Resilient Voltage-Controlled MeRAM Using Write Assist Techniques. IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, Florence, Italy. ⟨hal-02288533⟩
  • You Wang, Yue Zhang, Zhabg Youguang, Weisheng Zhao, Hao Cai, et al.. Design Space Exploration of Magnetic Tunnel Junction based Stochastic Computing in Deep Learning. To appear in Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2018, Chicago, Illinois, United States. pp.23-25. ⟨hal-02287894⟩
  • Fabio Batagin Armelin, Lirida Alves de Barros Naviner, Roberto d'Amore. Probability Aware Fault-Injection Approach for SER Estimation. Proceedings of IEEE Latin American Test Symposium (LATS), Mar 2018, São Paulo, SP, Brazil. ⟨hal-02287888⟩
  • Fabio Batagin Armelin, Lirida Alves de Barros Naviner, Roberto d'Amore. Using FPGA self-produced transients to emulate SETs for SER estimation. Proceedings of IEEE Latin American Test Symposium (LATS), Mar 2018, São Paulo, SP, Brazil. ⟨hal-02288530⟩
  • Jean-Luc Danger. Formalism to assess and enhance the entropy and reliability of a Loop-PUF. CRYPTO'IC, Sep 2017, Chengdu, China. ⟨hal-02287902⟩
  • Mariem Slimani, Karim Benkalaia, Lirida Alves de Barros Naviner. Analysis of Ageing effects on ARTIX7 XILINX FPGA. European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Sep 2017, Bordeaux, France. ⟨hal-02287636⟩
  • Nilson Maciel, Elaine Crespo Marques, Lirida Alves de Barros Naviner. Sparsity Analysis using a Mixed Approach with Greedy and LS Algorithms on Channel Estimation. International Conference on Frontiers of Signal Processing (ICFSP), Sep 2017, Paris, France. pp.91-95. ⟨hal-02287640⟩
  • Laurent Sauvage. Electromagnetic Fault Injection: from Attack to Countermeasure Design. CryptoIC, Sep 2017, Chengdu, China. ⟨hal-02287699⟩
  • Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao. Novel Pulsed-Latch Replacement in Non-Volatile Flip-Flop Core. VLSI (ISVLSI), 2017 IEEE Computer Society Annual Symposium on, Jun 2017, Bochum, Germany. ⟨hal-02287633⟩
  • Jean-Luc Danger, Olivier Rioul, Sylvain Guilley, Alexander Schaub. Formalism to assess the entropy and reliability of the loop-PUF. 15th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2017), Jun 2017, Smolenice, Slovakia. ⟨hal-02287598⟩
  • Chien-Yi Wang, Shirin Saeedi Bidokhti, Michèle Wigger. Improved Converses and Gap-Results for Coded Caching. ISIT 2017, Jun 2017, Aix-La-Chapelle, Germany. ⟨hal-02287714⟩
  • Noriyuki Miura, Kohei Matsuda, Karol Myszkowski, Makoto Nagata, Shivam Bhasin, et al.. A 2.5ns-Latency 0.39pJ/b 289µm2/Gb/s Ultra-Light-Weight PRINCE Cryptographic Processor. Symposium on VLSI Circuits, Jun 2017, Kyoto, Japan. pp.C266-C267. ⟨hal-02288491⟩
  • Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao. Energy Efficient Magnetic Tunnel Junction Based Hybrid LSI Using Multi-Threshold UTBB-FD-SOI Device. Great Lakes Symposium on VLSI 2017 (GLSVLSI 17), May 2017, Banff, Canada. ⟨hal-02287632⟩
  • Francisco Veirano, Lirida Alves de Barros Naviner, Fernando Silveira. Asymmetrical Length Biasing for Energy Efficient Digital Circuits. IEEE Latin American Symposium on Circuits and Systems, Feb 2017, Bariloche, Argentina. ⟨hal-02287637⟩
  • Alexandre Stempkovskiy, Dmitry Telpukhov, Roman Solovyev, Ekaterina Balaka, Lirida Alves de Barros Naviner. Practical metrics for evaluation of fault-tolerant logic design. IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering, Feb 2017, Saint Petersbourgh, Russia. pp.569-573. ⟨hal-02287656⟩
  • Nicolas Bruneau, Sylvain Guilley, Annelie Heuser, Olivier Rioul, François-Xavier Standaert, et al.. Taylor Expansion of Maximum Likelihood Attacks for Masked and Shuffled Implementations. 22nd Annual International Conference on the Theory and Applications of Cryptology and Information Security (AsiaCrypt 2016), Dec 2016, Hanoi, Vietnam. ⟨hal-02287426⟩
  • Laurent Sauvage, Sofiane Takarabt, Youssef Souissi. Secure Silicon: Towards Virtual Prototyping. TRUDEVICE, Nov 2016, Barcelona, Spain. ⟨hal-02287467⟩
  • Jean-Luc Danger, Sylvain Guilley, Philippe Nguyen, Olivier Rioul. PUFs: Standardization and Evaluation. 2nd IEEE Workshop on Mobile System Technologies (MST 2016), Sep 2016, Milano, Italy. ⟨hal-02288475⟩
  • Nicolas Bruneau, Sylvain Guilley, Annelie Heuser, Marion Damien, Olivier Rioul. Optimal side-channel attacks for multivariate leakages and multiple models. PROOFS 2016 Security Proofs for Embedded Systems, Aug 2016, Santa Barbara, United States. ⟨hal-02300060⟩
  • Kazuhide Fukushima, Youssef Souissi, Seira Hidano, Robert Nguyen, Jean-Luc Danger, et al.. Delay PUF Assessment Method Based on Side-Channel and Modeling Analyzes. TrustCom-16, Aug 2016, Tianjin, China. ⟨hal-02287456⟩
  • Eloi De Cherisey, Sylvain Guilley, Annelie Heuser, Olivier Rioul. On the optimality and practicability of mutual information analysis in some scenarios. ArticCrypt 2016, Jul 2016, Longyearbyen, Svalbard, Norway. ⟨hal-02300055⟩
  • Olivier Rioul, Patrick Solé, Sylvain Guilley, Jean-Luc Danger. On the Entropy of Physically Unclonable Functions. 2016 IEEE International Symposium on Information Theory (ISIT'16), Jul 2016, Barcelona, Spain. ⟨hal-02288459⟩
  • Benjamin Coeffic, Victor Malherbe, Jean-Marc Daveau, Gilles Gasiot, Lirida A. B. Naviner, et al.. A Layout-Based Fault Injection Methodology for SER Prediction: Implementation and Correlation with 65nm Heavy Ion Experimental Results. Proceedings of IEEE Nuclear and Space Radiation Effects Conference (NSREC), Jul 2016, New Orleans, United States. ⟨hal-02288532⟩
  • Olivier Rioul, Annelie Heuser, Sylvain Guilley, Jean-Luc Danger. Inter-Class vs. Mutual Information as Side-Channel Distinguishers. 2016 IEEE International Symposium on Information Theory (ISIT'16), Jul 2016, Barcelona, Spain. ⟨hal-02287308⟩
  • Eloi De Cherisey, Sylvain Guilley, Olivier Rioul, Darshana Jayasinghe. Template attacks with partial profiles and Dirichlet priors: Application to timing attacks. Hardware and Architectural Support for Security and Privacy (HASP 2016), Jun 2016, Seoul, South Korea. ⟨hal-02300026⟩
  • Noriyuki Miura, Zakaria Najm, Wei He, Shivam Bhasin, Xuan-Thuy Ngo, et al.. PLL to the rescue: a novel EM fault countermeasure. DAC, Jun 2016, Austin, United States. ⟨10.1145/2897937.2898065⟩. ⟨hal-02288461⟩
  • Olivier Rioul, Patrick Solé, Sylvain Guilley, Jean-Luc Danger. A challenge code for maximizing the entropy of PUF responses. Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2016), Jun 2016, Montpellier, France. ⟨hal-02287330⟩
  • Olivier Rioul, Nicolas Bruneau, Sylvain Guilley, Annelie Heuser, François-Xavier Standaert. Taylor expansion of maximum likelihood attacks, with application to masked and shuffled implementations. Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2016), Jun 2016, Montpellier, France. ⟨hal-02287328⟩
  • Eloi de Chérisey, Sylvain Guilley, Olivier Rioul, Annelie Heuser. Defining perceived information based on Shannon’s communication theory. Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2016), Jun 2016, Montpellier, France. ⟨hal-02287329⟩
  • Natalija Jovanovic, Olivier Thomas, Elisa Vianello, Boris Nikolic, Lirida A. B. Naviner. Design Considerations for Reliable OxRAM-based Non-Volatile Flip-Flops in 28nm FD-SOI Technology. Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), May 2016, Montreal, Canada. pp.1146-1149, ⟨10.1109/ISCAS.2016.7527448⟩. ⟨hal-02287862⟩
  • Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, A.E. Pricco, S. Parini, et al.. Radiation Hardening Improvement of a SerDes under Heavy Ions up to 60 MeV.cm2/mg by Layout-Aware Fault Injection. Proceedings of IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE), Mar 2016, Austin, Texas, United States. ⟨hal-02287892⟩
  • Jean-Luc Danger. Overview of Protections Against IC Counterfeiting and Hardware Trojan Horses. ISSCC, Jan 2016, Sab Francisco, United States. ⟨hal-02287903⟩
  • Letitia W. Li, Guillaume Duc, Renaud Pacalet. Hardware-assisted memory tracing on new SoCs embedding FPGA fabrics. Annual Computer Security Applications Conference - ACSAC 2015, Dec 2015, Los Angeles, United States. ⟨hal-02288442⟩
  • Mariem Slimani, Lirida A. B. Naviner. A Tool for Transient Fault Analysis in Combinational Circuits. IEEE International Conference on Electronics, Circuits, and Systems, Dec 2015, Caire, Egypt. ⟨hal-02287234⟩
  • Eloi de Chérisey, Annelie Heuser, Sylvain Guilley, Olivier Rioul. A Key to Success: Success Exponents for Side-Channel Distinguishers. 16th International Conference on Cryptology in India (IndoCrypt 2015), Dec 2015, Bangalore, India. pp.270-290. ⟨hal-02287175⟩
  • Mariem Slimani, Arwa Ben Dhia, Lirida Alves de Barros Naviner. A Novel Analytical Method for Defect Tolerance Assessment. European Symposium on Reliability of Electron devices, Failure physics and Analysis, Oct 2015, Toulouse, France. ⟨hal-01216726⟩
  • Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao. Ultra wide voltage range consideration of reliability-aware STT magnetic flip-flop in 28nm FDSOI technology. 26th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2015, Toulouse, France. ⟨hal-02287226⟩
  • Natalija Jovanovic, Elisa Vianello, Olivier Thomas, Boris Nikolic, Lirida A. B. Naviner. Design insights for reliable energy efficient OxRAM-based flip-flop in 28nm FD-SOI. Proceedings of IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Oct 2015, Sonoma Valley, CA, United States. ⟨hal-02287895⟩
  • Nicolas Bruneau, Sylvain Guilley, Annelie Heuser, Damien Marion, Olivier Rioul. Less is more: Dimensionality reduction from a theoretical perspective. 17th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2015), Sep 2015, Saint-Malo, France. ⟨hal-02287177⟩
  • Xavier Pons Masbernart, Christophe Gruet, Eric Georgeaux, Lirida A. B. Naviner. D2D Broadcast Communications for 4G PMR Networks. Proceedings of IFIF International Conference on New Technologies, Mobility and Security (NTMS), Jul 2015, Paris, France. ⟨hal-02287897⟩
  • Eloi De Cherisey, Annelie Heuser, Sylvain Guilley, Olivier Rioul. On the optimality of mutual information analysis for discrete leakages. 13th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2015), Jun 2015, Leuven, Belgium. ⟨hal-02300011⟩
  • Emna Amouri, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger. Countering Early Propagation and Routing Imbalance of DPL. International Conference on IC Design and Technology (ICICDT), Jun 2015, Leuven, Belgium. ⟨10.1109/ICICDT.2015.7165897⟩. ⟨hal-02287122⟩
  • Laurent Sauvage. Electromagnetic Fault injection: Impact on FPGA. Journée Sécurité Numérique du GDR SoC-SiP, Jun 2015, Paris, France. ⟨hal-02287253⟩
  • Sylvain Guilley, Annelie Heuser, Olivier Rioul, François-Xavier Standaert. Template Attacks, Optimal Distinguishers and the Perceived Information Metric. 13th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2015), Jun 2015, Leuven, Belgium. ⟨hal-02287176⟩
  • Han Le Duc, D. M. Nguyen, Chadi Jabbour, Tarik Graba, Patricia Desgreys, et al.. Hardware Implementation of All Digital Calibration for Undersampling TIADCs. IEEE International Symposium on Circuits and Systems ISCAS2015, May 2015, Lisbon, Portugal. ⟨hal-02287188⟩
  • Laurent Sauvage. Injection électromagnétique de fautes sur FPGA : caractérisation & contre-mesure. CRYPTO'PUCES, May 2015, Porquerolles, France. ⟨hal-02287251⟩
  • Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, F. Abouzeid, et al.. Frequency and Voltage Effects on SER on a 65nm Sparc-V8 Microprocessor Under Radiation Test. Proceedings of IEEE International Reliability Physics Symposium (IRPS), Apr 2015, Monterrey, CA, United States. ⟨hal-02287890⟩
  • Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, Lirida Alves de Barros Naviner, et al.. A Layout-Aware Approach to Fault Injection for Improving Failure Mode Prediction. Proceedings of Workshop on Silicon Errors in Logic - System Effects (SELSE), Mar 2015, Austin, United States. ⟨hal-02288531⟩
  • Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Lirida Alves de Barros Naviner, Philippe Roche. Partial Triplication of a Sparc-V8 Microprocessor Using Fault Injection. Proceedings of IEEE Latin American Symposium on Circuits and Systems (LASCAS), Feb 2015, Montevideo, Uruguay. ⟨hal-02287891⟩
  • Nicolas Bruneau, Sylvain Guilley, Annelie Heuser, Olivier Rioul. Masks will fall off: Higher-order optimal distinguishers. International Conference on the Theory and Application of Cryptology and Information Security (AsiaCrypt), Dec 2014, Kaoshiung, Taiwan. pp.344-365. ⟨hal-02287072⟩
  • Xavier Pons Masbernart, S. Althunibat, G Kibalya, Christophe Gruet, Lirida A. B. Naviner, et al.. Battery-aware network discovery algorithm for mobile terminals within heterogeneous networks. Proceedings of IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks (CAMAD), Dec 2014, Athens, Greece. ⟨hal-02287896⟩
  • Nicolas Bruneau, Jean-Luc Danger, Sylvain Guilley, Annelie Heuser, Yannick Teglia. Boosting High-Order Correlation Attacks by Dimensionality Reduction. SPACE, Oct 2014, Pune, India. ⟨10.1007/978-3-319-12060-7_13⟩. ⟨hal-02286958⟩
  • Shivam Bhasin, Nicolas Bruneau, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm. Analysis and Improvements of the DPA Contest v4 Implementation. SPACE, Oct 2014, Pune, India. ⟨10.1007/978-3-319-12060-7_14⟩. ⟨hal-02288411⟩
  • Annelie Heuser, Olivier Rioul, Sylvain Guilley. Good is not good enough: Deriving optimal distinguishers from communication theory. 16th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2014), Sep 2014, Busan, South Korea. pp.55-74. ⟨hal-02286943⟩
  • Hao Cai, Kaikai Liu, Lirida Alves de Barros Naviner. A Study of Statistical Variability-aware Methods. IEEE International Symposium on Radio Frequency Integration Technology (RFIT), Aug 2014, Hefei, China. ⟨hal-02286946⟩
  • Alexander Schaub, Emmanuel Schneider, Alexandros Hollender, Vinicius Calasans, Laurent Jolie, et al.. Attacking suggest boxes in web applications over https using stochastic side-channel algorithms. 9th International Conference on Risks and Security of Internet and Systems (CRISIS 2014), Aug 2014, Trente, Italy. ⟨hal-02288408⟩
  • Arwa Ben Dhia, Mariem Slimani, Lirida Alves de Barros Naviner. Comparative Study of Defect-Tolerant Multiplexers for FPGAs. 20th IEEE International On-Line Testing Symposium (IOLTS), Jul 2014, Platja d'Aro, Spain. pp.7-12. ⟨hal-01062059⟩
  • Arwa Ben Dhia, Mariem Slimani, Lirida A. B. Naviner. A Defect-Tolerant Multiplexer Using Differential Logic for FPGAs. IEEE 21st Mixed Design of Integrated Circuits and Systems Conference (MIXDES), Jun 2014, Lublin, Poland. pp.375-380. ⟨hal-01062063⟩
  • Annelie Heuser, Olivier Rioul, Sylvain Guilley. When optimal means optimal: Finding optimal distinguishers from the mathematical theory of communication. 12th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2014), Jun 2014, Annecy, France. ⟨hal-02286940⟩
  • Ting An, Kaikai Liu, Hao Cai, Lirida Alves de Barros Naviner. Efficient Implementation for Accurate Analysis of CED Circuits Against Multiple Faults. 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES), Jun 2014, Lublin, Poland. ⟨hal-02286893⟩
  • Natalija Jovanovic, Olivier Thomas, Elisa Vianello, Jean-Michel Portal, Boris Nikolic, et al.. OxRAM-Based Non Volatile Flip-Flop in 28nm FDSOI. Proceedings of IEEE NEWCAS Conference (NEWCAS), Jun 2014, Trois Rivieres, Canada. ⟨hal-02288534⟩
  • Mariem Slimani, Arwa Ben Dhia, Lirida A. B. Naviner. Cross Logic : A New Approach for Defect-Tolerant Circuits. IEEE International Conference on IC Design and Technology (ICICDT), May 2014, Austin, United States. pp.1-4. ⟨hal-01062064⟩
  • Ting An, Hao Cai, Lirida Alves de Barros Naviner. Simulation Study of Aging in CMOS Binary Adders. MIPRO 37th International Convention/Microelectronics, Electronics and Electronic Technology, May 2014, Opatija, Croatia. ⟨hal-02288395⟩
  • Ting An, Kaikai Liu, Lirida Alves de Barros Naviner. Analytical method for reliability assessment of concurrent checking circuits under multiple faults. MIPRO 37th International Convention/Microelectronics, Electronics and Electronic Technology, May 2014, Opatija, Croatia. ⟨hal-02286867⟩
  • Annelie Heuser, Olivier Rioul, Sylvain Guilley. A theoretical study of Kolmogorov-Smirnov distinguishers: Side-channel analysis vs. differential cryptanalysis. Fifth International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2014), Apr 2014, Paris, France. pp.9-28. ⟨hal-02286939⟩
  • Jérémie Brunel, Salaheddine Ouaarab, Renaud Pacalet, Guillaume Duc. SecBus, a software/hardware architecture for securing external memories. The 2nd IEEE International Conference on Mobile Cloud Computing, Services, and Engineering, IEEE MobileCloud 2014, Apr 2014, Oxford, United Kingdom. ⟨hal-02286951⟩
  • Arwa Ben Dhia, Mariem Slimani, Lirida Alves de Barros Naviner. Improving the Robustness of a Switch Box in a Mesh of Clusters FPGA. 15th IEEE Latin American Test Workshop (LATW), Mar 2014, Fortaleza, Brazil. pp.1-6. ⟨hal-01062066⟩
  • Pablo Rauzy, Sylvain Guilley. Formal Analysis of CRT-RSA Vigilant's Countermeasure Against the BellCoRe Attack: A Pledge for Formal Methods in the Field of Implementation Security. Program Protection and Reverse Engineering Workshop 2014, Jan 2014, San Diego, CA, United States. pp.Article No. 2, ⟨10.1145/2556464.2556466⟩. ⟨hal-00939473v2⟩
  • Arwa Ben Dhia. A Defect-tolerant Cluster in a Mesh SRAM-based FPGA. International Conference on Field-Programmable Technology (ICFPT), Dec 2013, Kyoto, Japan. pp.434-437. ⟨hal-01062073⟩
  • Pierre Belgarric, Shivam Bhasin, Nicolas Bruneau, Jean-Luc Danger, Nicolas Debande, et al.. Time-frequency analysis for second-order attacks. Smart Card Research and Advanced Application Conference (CARDIS 2013), Nov 2013, Berlin, Germany. pp.108-122. ⟨hal-02299996⟩
  • Arwa Ben Dhia, Samuel Nascimento Pagliarini, Lirida Alves de Barros Naviner, Habib Mehrez, Philippe Matherat. A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs. European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2013, Arcachon, France. pp.1189-1193. ⟨hal-01062075⟩
  • Samuel Nascimento Pagliarini, Arwa Ben Dhia, Lirida Alves de Barros Naviner, J. F. Naviner. SNaP: a Novel Hybrid Method for Circuit Reliability Assessment Under Multiple Faults. European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2013, Arcachon, France. pp.1230-1234. ⟨hal-01062078⟩
  • Arwa Ben Dhia, Lirida Alves de Barros Naviner, Philippe Matherat. Evaluating CLB Designs under Multiple SETs in SRAM-based FPGAs. IEEE Symp. Defect and Fault Tolerance (DFT), Oct 2013, New-York City, United States. pp.112-117. ⟨hal-01062101⟩
  • Ting An, Lirida Alves de Barros Naviner, Philippe Matherat. A Low Cost Reliable Architecture for S-Boxes in AES Processors. IEEE Symp. Defect and Fault Tolerance (DFT), Oct 2013, New York City, U.S. Outlying Islands. pp.155-160. ⟨hal-01024892⟩
  • Kaikai Liu, Hao Cai, Ting An, Lirida Alves de Barros Naviner, Jean-François Naviner, et al.. Reliability analysis of combinational circuits with the influences of noise and single-event transients. IEEE Symp. Defect and Fault Tolerance (DFT), Oct 2013, New York City, United States. ⟨hal-02286814⟩
  • Laurent Sauvage. Electric Probes for Fault Injection Attack. APEMC, Aug 2013, Melbourne, Australia. ⟨hal-02286766⟩
  • Kaikai Liu, Ting An, Hao Cai, Lirida Alves de Barros Naviner, Jean-François Naviner, et al.. A General Cost-effective Design Structure for Probabilistic-Based Noise-Tolerant Logic Functions in Nanometer CMOS Technology. Eurocon 2013, Jul 2013, Zagreb, Croatia. pp.1829-1836, ⟨10.1109/EUROCON.2013.6625225⟩. ⟨hal-02286855⟩
  • Ting An, Lirida Alves de Barros Naviner, Philippe Matherat. Evaluation of Fault-tolerant Composite Field AES S-Boxes under Multiple Transient Faults. IEEE International NEWCAS Conference, Jun 2013, Paris, France. pp.1 - 4. ⟨hal-00973720⟩
  • Kaikai Liu, Lirida Alves de Barros Naviner, Jean-François Naviner. A model to simulate the behaviour of probabilistic gates. Journées Nationales du Réseau Doctoral de Microélectronique, Jun 2013, Grenoble, France. ⟨hal-02286894⟩
  • Annelie Heuser, Sylvain Guilley, Olivier Rioul. Revealing the secrets of success: Theoretical efficiency of side-channel distinguishers. 11th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2013), Jun 2013, Fréjus, France. ⟨hal-02288378⟩
  • Samuel Nascimento Pagliarini, Lirida Alves de Barros Naviner, Jean-François Naviner. Circuit-level Hardening Against Multiple Faults: Combining Global TMR and Selective Hardening. Journées Nationales du Réseau Doctoral de Microélectronique, Jun 2013, Grenoble, France. ⟨hal-02286728⟩
  • Annelie Heuser, Sylvain Guilley, Olivier Rioul. Practical vs. theoretical evaluation of DPA and CPA. 3rd International Workshop on Cryptography, Robustness, and Provably Secure Schemes for Female Young Researchers (CrossFyre'13), Jun 2013, KU Leuven, Belgium. ⟨hal-02286734⟩
  • Arwa Ben Dhia, Lirida Alves de Barros Naviner, Philippe Matherat. Nouvelle architecture de BLE tolérante aux fautes dans les FPGAs SRAM. Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM), Jun 2013, Grenoble, France. ⟨hal-02288374⟩
  • Hao Cai, H. Petit, J. F. Naviner. A Fast Reliability-aware Approach for Analogue Integrated Circuits based on Pareto Fronts. IEEE International NEWCAS Conference, Jun 2013, Paris, France. ⟨hal-02286777⟩
  • Hao Cai, H. Petit, J. F. Naviner. NBTI Effects on Clock Uncertainty and Applications in Continuous-Time Sigma-Delta Modulator. EdaWorkshop13, May 2013, Dresden, Germany. ⟨hal-02286519⟩
  • Yu-Ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, et al.. Introduction to Recent Research on EM Information Leakage. Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC2013), May 2013, Melbourne, Australia. pp.320-323. ⟨hal-02286818⟩
  • Arwa Ben Dhia, Lirida Alves de Barros Naviner, Philippe Matherat. Comparison of Fault-Tolerant Fabless CLBs in SRAM-based FPGAs. IEEE Latin-American Test Workshop (LATW), Apr 2013, Cordoba, Argentina. pp.1-6. ⟨hal-01062112⟩
  • Ting An, Matteo Causo, Lirida Alves de Barros Naviner, Philippe Matherat. Transient Fault Analysis of CORDIC Processor. IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Séville, Spain. pp.757 - 760. ⟨hal-00973764⟩
  • Samuel Nascimento Pagliarini, Arwa Ben Dhia, Lirida Alves de Barros Naviner, J. F. Naviner. Automatic Selective Hardening Against Soft Errors: a Cost-based and Regularity-aware Approach. IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Sevilla, Spain. pp.753-756. ⟨hal-01062119⟩
  • Arwa Ben Dhia, Lirida Alves de Barros Naviner, P. Matherat. A New Fault-Tolerant Architecture for CLBs in SRAM-based FPGAs. IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Sevilla, Spain. pp.761-764. ⟨hal-01062116⟩
  • Matteo Causo, Ting An, Lirida Alves de Barros Naviner. Parallel Scaling-Free and Area-Time Efficient CORDIC Algorithm. IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Séville, Spain. pp.149 - 152. ⟨hal-01024891⟩
  • Jean-Luc Danger. Delay PUF Overview. GDR Soc-SIP, Nov 2012, Paris, France. ⟨hal-02286508⟩
  • Houssem Maghrebi, Olivier Rioul, Sylvain Guilley, Jean-Luc Danger. Comparison between Side-Channel Analysis Distinguishers. 14th International Conference on Information and Communications Security (ICICS'2012), Oct 2012, Hong Kong, China. pp.331-340. ⟨hal-02299929⟩
  • Samuel Nascimento Pagliarini, Gutemberg Gonçalves dos Santos Jr, Lirida Alves de Barros Naviner, Jean-François Naviner. Exploring the Feasibility of Selective Hardening for Combinational Logic. European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2012, Cagliari, Italy. ⟨hal-02288323⟩
  • Taoufik Chouta, Jean-Luc Danger, Laurent Sauvage, Tarik Graba. A Small and High-performance Coprocessor for Fingerprint Match-On-Card. DSD, Sep 2012, Cesme/Izmir, Turkey. ⟨10.1109/DSD.2012.14⟩. ⟨hal-02286419⟩
  • Felipe Almeida, Fernanda Lima Kastensmidt, Samuel Nascimento Pagliarini, Luis Entrena, Almudena Lindoso, et al.. Single-Event-Induced Charge Sharing Effects in TMR with Different Levels of Granularity. European Conference on Radiation and Its Effects on Components and Systems (RADECS), Sep 2012, Biarritz, France. ⟨hal-02286461⟩
  • Briais Sébastien, Sylvain Guilley, Jean-Luc Danger. A formal study of two physical countermeasures against side channel attacks. PROOFS, Sep 2012, Leuven, Belgium. ⟨10.1007/s13389-013-0054-6⟩. ⟨hal-02286504⟩
  • Samuel Nascimento Pagliarini, Lirida Alves de Barros Naviner, Jean-François Naviner. Towards the Mitigation of Multiple Faults Induced by Single Event Effects: Combining Global TMR and Selective Hardening. European Conference on Radiation and Its Effects on Components and Systems (RADECS), Sep 2012, Biarritz, France. ⟨hal-02286459⟩
  • Haruki Shimada, Yu-Ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, et al.. Efficient mapping of EM radiation associated with information leakage for cryptographic devices. EMC, Aug 2012, Pittsburgh, United States. pp.794-799, ⟨10.1109/ISEMC.2012.6351663⟩. ⟨hal-02288342⟩
  • Tian Ban, Lirida Alves de Barros Naviner. Signal Probability, Reliability and Error Bound of Majority Voter in TMR. IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2012, Boise, Idaho, United States. ⟨hal-02286333⟩
  • Guillaume Barbu, Ph. Hoogvorst, Guillaume Duc. Tampering with Java Card Exceptions – The Exception Proves the Rule. SECRYPT - International Conference on Security and Cryptography, Jul 2012, Rome, Italy. pp.55-63. ⟨hal-02288320⟩
  • Arwa Ben Dhia, Lirida Alves de Barros Naviner, P. Matherat. Analyzing and Alleviating the Impact of Errors on an SRAM-based FPGA Cluster. IEEE International On-Line Testing Symposium (IOLTS), Jun 2012, Sitges, Spain. pp.31-36. ⟨hal-01062799⟩
  • Gutemberg Gonçalves dos Santos Jr, Lirida Alves de Barros Naviner, J. F. Naviner. Reliability and Hardening of FPGA Implementations face to Radiative Constraints. Journées Nationales Electronique et Rayonnements Naturels au Niveau du Sol (RADSOL), Jun 2012, Paris, France. ⟨hal-02288324⟩
  • Samuel Nascimento Pagliarini, Lirida Alves de Barros Naviner, Jean-François Naviner. Selective Hardening Concerning Single and Multiple Faults. Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM), Jun 2012, Marseille, France. ⟨hal-02286334⟩
  • Hao Cai, H. Petit, J. F. Naviner. A Statistical Method for Transistor Ageing and Process Variation Applied to Reliability Simulation. 3rd European Workshop on CMOS variability, Jun 2012, Nice – Sophia Antipolis, France. ⟨hal-02286335⟩
  • Houssem Maghrebi, Sylvain Guilley, Olivier Rioul, Jean-Luc Danger. Some results about the distinction of side-channel distinguishers based on distributions. 10th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2012), Jun 2012, Saint-Etienne, France. ⟨hal-02286359⟩
  • Samuel Nascimento Pagliarini, Lirida Alves de Barros Naviner, Jean-François Naviner. Selective Hardening Methodology for Combinational Logic. IEEE Latin-American Test Workshop (LATW), Apr 2012, Quito, Ecuador. pp.6. ⟨hal-00695808⟩
  • Samuel Nascimento Pagliarini, Denis Teixeira Franco, Lirida Alves de Barros Naviner, Jean-François Naviner. Reliability estimation methods : Tradeoffs between complexity and accuracy. Southern Simposium of Microelectronics, Apr 2012, Sao Miguel das Missoes, RS, Brazil. ⟨hal-02288322⟩
  • Tian Ban, Lirida Alves de Barros Naviner. Fault tolerant architectures in nanoelectronics: The progressive approach. Southern Simposium of Microelectronics, Apr 2012, Sao Miguel das Missoes, RS, Brazil. ⟨hal-02286332⟩
  • Houssem Maghrebi, Emmanuel Prouff, Sylvain Guilley, Jean-Luc Danger. A First-Order Leak-Free Masking Countermeasure. CT-RSA, Feb 2012, San Francisco, CA, United States. pp.156-170, ⟨10.1007/978-3-642-27954-6_10⟩. ⟨hal-02288316⟩
  • Youssef Souissi, Shivam Bhasin, Maxime Nassar, Sylvain Guilley, Jean-Luc Danger. Towards Different Flavors of Combined Side Channel Attacks. CT-RSA, Feb 2012, San Francisco, United States. pp.245-259, ⟨10.1007/978-3-642-27954-6_16⟩. ⟨hal-02288312⟩

Poster

  • Wei Cheng, Olivier Rioul, Sylvain Guilley. Guessing a secret cryptographic key from side-channel leakages. 2019 IEEE European School of Information Theory (ESIT'19), Apr 2019, Sophia Antipolis, France. 2019. ⟨hal-02300782⟩
  • Nicolas Bruneau, Sylvain Guilley, Annelie Heuser, Marion Damien, Olivier Rioul. Optimal attacks for multivariate and multi-model side-channel leakages. 18th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2016), Aug 2016, Santa Barbara, United States. 2016. ⟨hal-02300058⟩
  • Sylvain Guilley, Annelie Heuser, Martial Ren, Olivier Rioul, Simon Sellem. Success rate exponents for side-channel attacks. 16th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2014), Sep 2014, Busan, South Korea. ⟨hal-02300002⟩
  • François Bailly, Sylvain Guilley, Annelie Heuser, Olivier Rioul. On optimality of MIA for unknown leakage models and related new practical results. 16th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2014), Sep 2014, Busan, South Korea. 2014. ⟨hal-02300004⟩
  • Annelie Heuser, Sylvain Guilley, Olivier Rioul. Maximizing the success of a side-channel attack. 3e colloque de l'Institut Mines-Télécom, Numérique: Grande échelle et complexité (Sécurité, sûreté, risques), Mar 2014, Paris, France. 2014. ⟨hal-02299999⟩
  • Annelie Heuser, Sylvain Guilley, Olivier Rioul. Side-channel attacks. European Google Doctoral Fellowship Forum, Sep 2013, Zurich, Switzerland. 2013. ⟨hal-02299991⟩
  • Annelie Heuser, Sylvain Guilley, Olivier Rioul. Success metric: An all-in-one criterion for comparing side-channel distinguishers. 15th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2013), Aug 2013, Santa Barbara, United States. 2013. ⟨hal-02299990⟩

Ouvrage (y compris édition critique et traduction)

  • P. Matherat. Doublures & redoublements. Éditions Tsémah, 72 p., 2015. ⟨hal-02287137⟩

Chapitre d'ouvrage

  • Kais Chibani, Adrien Facon, Sylvain Guilley, Damien Marion, Yves Mathieu, et al.. Fault Analysis Assisted by Simulation. Automated Methods in Cryptographic Fault Analysis, Springer International Publishing, pp.263-277, 2019, ⟨10.1007/978-3-030-11333-9_12⟩. ⟨hal-02319491⟩
  • Zouha Cherif, Jean-Luc Danger, Florent Lozac'H, Philippe Nguyen. Physically Unclonable Function: Principle, Design and Characterization of the Loop PUF. Trusted Computing for Embedded Systems, SPRINGER, pp.115-133, 2015, ⟨10.1007/978-3-319-09420-5_6⟩. ⟨hal-02287062⟩
  • Xavier Pons Masbernart, Eric Georgeaux, Christophe Gruet, François Montaigne, Lirida Alves de Barros Naviner. From DMO to D2D. Wireless Public Safety Networks: Overview and Challenges, ISTE Press & Elsivier, pp.9-126, 2015. ⟨hal-02287836⟩
  • Annelie Heuser, Olivier Rioul, Sylvain Guilley, Jean-Luc Danger. Information theoretic comparison of side-channel distinguishers: Inter-class distance, confusion, and success. Trusted Computing for European Embedded Systems, Springer, pp.187-225, 2014. ⟨hal-02286944⟩
  • P. Maris Ferreira, Hao Cai, Lirida Alves de Barros Naviner. Reliability Aware AMS/RF Performance Optimization. Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, IGI Global, 2014. ⟨hal-02286875⟩
  • J. Le Feuvre, Yves Mathieu. 23 : Graphics Composition for Multiview Displays. Emerging Technologies for 3D Video, Wiley, 2013. ⟨hal-02286558⟩
  • Sylvain Guilley, Jean-Luc Danger. 17 : Global Fault on Cryptographic Circuits. Fault Analysis in Cryptography, Springer, pp.295-312, 2012. ⟨hal-02286401⟩
  • Anthony Kolar, Olivier Romain, Tarik Graba, Thomas Ea, Bertrand Granado. Stereo Vision. http://intechweb.org/. Stereo Vision, 9 - The Integrated Active Stereoscopic Vision Theory, Integration and Application, I-tech, pp.131 - 152, 2008. ⟨hal-01534448⟩

Pré-publication, Document de travail

  • Sumanta Chaudhuri, Tarik Graba, Yves Mathieu. Multi-Valued Routing Tracks for FPGAs in 28nm FDSOI Technology. 2019. ⟨hal-02287527⟩

Rapport

  • Laurent Sauvage. Description des nouvelles attaques et de leurs caractéristiques en termes d'efficacité et de modèles de fautes. [Contrat] 2KCPV1206, Télécom ParisTech. 2014. ⟨hal-02286963⟩

HDR

  • Sylvain Guilley. Protection des Accélérateurs Matériels de Cryptographie Symétrique. Cryptographie et sécurité [cs.CR]. Université Paris-Diderot - Paris VII, 2012. ⟨tel-00815544⟩

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